The present invention pertains in general to integrated circuit device structures and in particular to current ratioing device structures for providing proportional output currents.
In some integrated circuit devices it is useful to have a number of current sources or current sinks providing proportional collector currents.
For transistors having the same common-emitter forward-current transfer ratio, .beta., and having the same characteristic relationship between base-emitter voltage drop. V.sub.BE, and collector current, I.sub.C, the current sunk by a given collector is a direct function of the area of the associated emitter for a given V.sub.BE.
Planar technology is most commonly used in the fabrication of integrated circuits. In this technology, the devices and components forming the integrated circuit extend below the surface of one plane of a silicon substrate. The devices and components are formed by selective diffusion of dopants into the substrates, each dopant creating a region of a characteristic conductivity type in the volume into which it diffuses. In order to control the zones of diffusion of the dopants, the layer of silicon to be treated is first covered by a layer of silicon dioxide, SiO.sub.2. The SiO.sub.2 is then coated with a photosensitive material known as a photoresist which may, for example, polymerize and harden in the presence of ultraviolet light. A photographic negative of a pattern of desired windows to be etched in the SiO.sub.2 is placed on the surface of the photoresist and ultraviolet light is shined through the negative to harden the photoresist except in those areas covered by the window pattern. After removing the negative and dissolving the unexposed portions of the photoresist, the SiO.sub.2 layer is etched away in those areas not covered by the hardened photoresist by exposure to a buffered hydrofluoric acid solution to provide a pattern of exposed portions of the layer beneath the SiO.sub.2 to be doped. A dopant tending to produce a region of a desired conductivity type is then diffused into the layer through the windows.
In one approach to current ratioing, the goal is to provide transistor emitters having areas proportional to the desired collector currents. However, because the emitter dopant diffuses out beneath the SiO.sub.2 layer beyond the edge of the etched window, the proportionality of areas on the photographic negative is not maintained in the doped regions.
Another approach to providing devices having a desired current ratio involves the use of a plurality of emitter regions having a unitary size. For example, in order to provide a first emitter for a first transistor and a second emitter for a second transistor so that the second emitter has twice the area of the first emitter, a single emitter area of unit size is used for the first emitter and two emitter areas of unit size are used for the second emitter. Because windows laid out to have equal area on the photographic negative should result in regions exhibiting the same amount of out-diffusion, the proportionality problem that exists where single windows having proportional areas are used is solved. However, if it is a relatively long distance, such as the distance found between transistors, between a sidewall of a given window in the photoresist and the next window, the sidewall tends to bow due to the tension characteristics of the photoresist. This bowing results in strong second order effects from the bowed-out sidewalls of the diffused region which reduce the accuracy of this approach.
"Dummy" resistors at opposite ends of a line of resistors, have been used to reduce distortion due to photoresist tension effects. However, this technique has not been applied to area ratioing.